This invention relates to a charge transfer circuit and, more particularly, to bucket brigade and charge-coupled circuits.
Summarizing representations concerning charge transfer circuits or devices, can be found in the technical journal "Elektronik", 1974, pp. 3 to 8, and in the technical journal "Internationale Elektronische Rundschau", 1973, pp. 239 to 244. With the aid of these circuits, it is known to delay analog signals, hence e.g. ac voltages of any optional waveform, or individually occurring signals, and thus store them temporarily. In so doing, the analog signal is quantized in accordance with the sampling theorem, and amounts of charge corresponding to the individual quantizing stages, are shifted within the charge transfer circuits by means of clock signals.
With charge transfer circuits, there may be considered on one hand, the so-called bucket brigade circuits and, on the other hand, the charge-coupled circuits.
Bucket brigade circuits comprise a plurality of similar stages each consisting of a transistor and of a capacitor arranged between the gate terminal and the collector terminal thereof, and are arranged in series in such a way that the collector terminal of the one is connected to the emitter terminal of the next following transistor, with the gate terminals of the even-numbered transistors being controlled by a first portion of the rectangular or sawtooth shaped clock signal while the gate terminals of the odd-numbered transistors are controlled by a second portion of the rectangular or sawtooth shaped clock signal. The two portions of the clock signal are of equal frequency and in such a way assigned to one another that the effective pulses of the one portion will come to lie in the gaps between the effective pulses of the other portion.
Bucket brigade circuits may be realized with the aid of discrete components, as well as in the form of integrated circuits. In the course of this it is possible to use transistors either of the bipolar type, as well as field-transistors, and in the latter case it is of particular advantage to use insulated-gate field-effect transistors, so that for the integrating purpose there is employed the so-called MOS technology.
The charge-coupled circuits are exclusively realizable in integrated form, because they do without the capacitor as an individual structure as used in the bucket brigade circuits, and because its effect is replaced by a corresponding arrangement of the electrodes and by correspondingly selecting the clock signal waveform.
The characteristic feature of the function of such charge transfer circuits resides in the fact that in the one clock signal phase, the even-numbered stages contain an analog signal voltage value while the odd-numbered stages, however, contain a neutral voltage value, whereas in the following clock signal phase, the odd-numbered stages have an analog signal voltage value and the even-numbered stages have a neutral voltage value.
To the delay time t of such charge transfer circuits, there applies the simple formula: ##EQU1## wherein n indicates the number of stages of the charge transfer circuit, and f.sub.T indicates the frequency of the clock signal. Accordingly, the delay time t is directly in proportion to the number of stages n, whereas the frequency of the clock signal, via the sampling theorem, has insofar an influence upon the delay time as the latter becomes reduced the higher the frequency is of the signal to be delayed and consequently, the higher the frequency is to be chosen of the clock signal, hence that in the case of an equal delay time for both low and high frequency signals, the number of stages therefor has to be enlarged.
Increasing the number of stages, however, presents certain problems. The charge transport along charge transfer circuits is susceptible to interferences in such a way that, at the end of the circuit, greater portions of the charge quantities go astray, which represent the analog signals. This loss of charge, of course, may be compensated for by so-called regenerating circuits, but these regenerating circuits require additional space which is undesirable in the case of integrated circuits. Moreover, the unlimited increase in the number of stages during integration is restricted by the fact that the manufacturing yield of functionable integrated circuits is inversely in proportion to the required crystal surface of the integrated circuit. Accordingly, above a certain number of stages, manufacture is either not at all possible, or at least not economical.